Au alloy bonding wire

ABSTRACT

Provided is a gold alloy bonding wire for semiconductor packaging. The gold alloy bonding wire is formed of gold having an ultrahigh purity of 99.999% or more. The gold alloy includes at least one of Mo, As, Po, and B within a range between 2 wt ppm and 25 wt ppm. The gold alloy may further include at least one of Na, Cd, Sb, Ta, and Cs within a range between 2 wt ppm and 30 wt ppm. The gold alloy may further include at least one of P, Tc, Re, Tl, and Ho within a range between 3 wt ppm and 30 wt ppm. The gold alloy may further include at least one of Na, Cd, Sb, Ta, and Cs within a range between 2 wt ppm and 30 wt ppm and at least one of P, Tc, Re, Tl, and Ho within a range between 3 wt ppm and 30 wt ppm.

CROSS-REFERENCE TO RELATED PATENT APPLICATION

This application claims the benefit of Korean Patent Application No. 10-2005-0038379, filed on May 9, 2005, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a bonding wire electrically connecting a chip pad of a semiconductor chip to a lead frame or a printed circuit board (PCB) during packaging of a semiconductor device, and more particularly, to an Au alloy bonding wire appropriate for packaging a high integrated semiconductor device.

2. Description of the Related Art

A solder not including lead, i.e., a lead-free solder, is used in the semiconductor and electronic industry in compliance with the regulation of materials detrimental to the environment. An IR flow process for a semiconductor package using a lead-free solder is performed at a temperature of 250° C. or more about 30° C. to 50° C. higher than an existing IR flow process. If a semiconductor package is exposed in a high temperature environment for a long time, an intermetallic compound is formed at a bonding portion between a chip pad and a bonding wire. Thus, cracks occur. As a result, the semiconductor package becomes poor. To solve these problems, a method of adding an anti-crack element within a range between 100 wt ppm and 10,000 wt ppm is used. However, the addition causes an electric resistance to be increased. Thus, an operation speed of the semiconductor package is reduced, but resistance heat is increased.

A number of wires of a semiconductor chip is continuously increased to increase a speed of a semiconductor device. Thus, a size of a chip pad to which a bonding wire is boned and a gap between wires are reduced. Therefore, the wires must be formed of a thinner metal line. However, a thinner, denser wire generates noise causing the poor transmission of an electric signal. To improve the poor transmission of the electric signal, there is suggested a low dielectric semiconductor chip in which the wire is coated with a thin low dielectric layer and insulated. If such a low dielectric is used, the follow problem occurs. Existing materials having low dielectric constants are soft and very weak. Thus, an adhesive strength to a silicon or metal wire is weak. As a result, although a small force is transmitted from an external source, the silicon or metal wire is cracked or stripped. Accordingly, there is required a bonding wire that may be bonded to a low dielectric semiconductor chip without chip cratering and chip breaking.

As the size of the chip pad and the gap between the wires are reduced, a diameter of a bonding wire is reduced. Thus, the straightness of the bonding wire is problematic in bonding and molding processes, and mold sweeping caused by the movement of a molding compound, directionality leaning, is problematic during injection of the molding compound. Also, as the development of technology for electronic parts is accelerated with the development of IT and communication industry, a height of a loop embodied as a bonding wire is lowered to make the electronic parts compact. However, if the height of the loop is too lowered, a ball neck is damaged. Thus, technology for solving the damage to the ball neck even at the low loop is required.

SUMMARY OF THE INVENTION

The present invention provides an Au alloy bonding wire having an alloy composition preventing a bonding portion with a chip pad from being cracked and a ball neck from being damaged even at a low loop, improving mold sweeping occurring in a molding process, and being applied to a low dielectric semiconductor chip.

According to an aspect of the present invention, there is provided a gold (Au) alloy bonding wire in which at least one of Mo, As, Po, and B is added to high-purity gold of 99.999% or more in an amount of 2-25 parts per million by weight (wt ppm) to the high-purity gold.

The gold may further include at least one of Pd in an amount of 30-90 wt ppm and Ca in an amount of 20-90 wt ppm is further added to the high-purity gold. A gold may further include at least one of Na, Cd, Sb, Ta, and Cs is added to high-purity gold of 99.999% or more in an amount of 2-30 wt ppm to the high-purity gold. The gold may further include at least one of P, Tc, Re, Ti, and Ho is further added to the high-purity gold in an amount of 3-30 wt ppm. The gold may further include at least one of Na, Cd, Sb, Ta, and Cs is further added to the high-purity gold in an amount of 2-30 wt ppm. The gold may further include at least one of P, Tc, Re, Tl, and Ho is further added to the high-purity gold in an amount of 3-30 wt ppm. The gold may further include at least one of Ni and Cu is further added to the high-purity gold in an amount of 20-90 wt ppm.

According to another aspect of the present invention, there is provided a gold alloy bonding wire in which at least one of Na, Cd, Sb, Ta, and Cs is added to high-purity gold of 99.999% or more in an amount of 2-30 wt ppm to the high-purity gold.

A gold may further include least one of P, Tc, Re, Tl, and Ho is added to high-purity gold of 99.999% or more in an amount of 3-30 wt ppm to the high-purity gold. Besides this composition, The gold may further include at least one of Ni and Cu is further added to the high-purity gold in an amount of 20-90 wt ppm.

According to still another aspect of the present invention, there is provided a gold bonding wire formed of gold having an ultrahigh purity of 99.999%, or more the gold may further include at least one of P, Tc, Re, Tl, and Ho is further added to the high-purity gold in an amount of 3-30 wt ppm

In the present invention, it is clarified that wt ppm is wt ppm with respect to a total weight of a gold alloy bonding wire for packaging.

DETAILED DESCRIPTION OF THE INVENTION First Embodiment

A bonding wire according to an embodiment of the present invention is formed by adding at least one of Mo, As, Po, and B within a range between 2 wt ppm and 25 wt ppm to Au having an ultrahigh purity of 99.999% or more. The Au alloy may further include at least one of Pd within a range between 30 wt ppm and 90 wt ppm and Ca within a range between 20 wt ppm and 90 wt ppm. Alternatively, the Au alloy may further include at least one of Na, Cd, Sb, Ta, and Cs within a range between 2 wt ppm and 30 wt ppm. The Au alloy may further include at least one of P, Tc, Re, Ti, and Ho within a range between 3 wt ppm and 30 wt ppm. The Au alloy may further include at least one of Na, Cd, Sb, Ta, and Cs within a range between 2 wt ppm and 30 wt ppm and at least one of P, Tc, Re, Tl, and Ho within a range between 3 wt ppm and 30 wt ppm. Besides one of the above-described various compositions, the Au alloy may further include at least one Ni and Cu within a range between 20 wt ppm and 90 wt ppm.

Although an added element constituting an alloy composition suggested in the present invention is added to less than 100 wt ppm, a bonding portion between a chip pad and a bonding wire can be efficiently prevented from being cracked. Since a content of the added element is small, a purity of the added element is kept to 99.99% or more to have a high electric characteristic. Also, a delay time of an electric signal caused by an increase in an electric resistance can be solved. As shown in an experiment that will be described later, the bonding portion between the chip pad and the bonding wire can be prevented at a high temperature of 150° C. and a reliability test temperature.

Since the bonding wire having above-described composition has an appropriate strength, molding sweeping occurring in a molding process can be improved or solved. Also, a ball neck can be prevented from being damaged during bonding of an ultralow loop.

Since the bonding wire having the above-described composition has an appropriate hardness, the bonding wire. On the contrary, in prior art, the bonding wire is cracked or stripped although a weak force is transmitted from an external source, since the bonding wire has weak adhesive and mechanical strengths to a silicon or metal wire during its bonding to a chip using a material having a very low dielectric constant is not cracked or stripped.

Second Embodiment

A bonding wire according to another embodiment of the present invention is formed by adding at least one of Na, Cd, Sb, Ta, and Cs within a range between 2 wt ppm and 30 wt ppm to Au having an ultrahigh purity of 99.999% or more. The Au may further include at least one of P, Tc, Re, Tl, and Ho within a range between 3 wt ppm and 30 wt ppm. Also, besides the above composition, the Au alloy may further include at least one of Ni and Cu within a range between 20 wt ppm and 90 wt ppm.

A bonding portion between the bonding wire having the above-described composition and a chip pad can be prevented from being cracked. Also, a ball neck can be prevented from being damaged even at a low loop. In addition, mold sweeping occurring in a molding process can be improved. Moreover, the bonding wire can be applied to a low dielectric semiconductor chip.

Third Embodiment

A bonding wire according to still another embodiment of the present invention is formed by adding at least one of P, Tc, Re, Tl, and Ho within a range between 3 wt ppm and 30 wt ppm to Au having an ultrahigh purity of 99.999%.

A bonding portion between the bonding wire having the above-described composition and a chip pad can be prevented from being cracked. Also, a ball neck can be prevented from being damaged even at a low loop. In addition, mold sweeping occurring in a molding process can be improved. Moreover, the bonding wire can be applied to a low dielectric semiconductor chip.

Types and Contents of Raw Material and Alloy Element

In a bonding wire according to the present invention, Au refined to have a high purity of at least 99.999% or more is used as a raw material. Au has a low electric resistance and thus is the best conductor for transmitting a signal of an electric circuit. Also, since Au is soft and malleable, Au can be extended or spread. However, Au is sensitive to a variation in an ambient temperature. Thus, Au is extended at a high temperature and has a weak mechanical strength. Therefore, in a case where Au is fabricated as a bonding wire to be bonded to a semiconductor package, a loop in which the bonding wire is formed may be sagged or swept. Au uses other elements by alloying and doping the other elements in the unit of wt ppm to show a high characteristic of an Au bonding wire used for packaging within a range keeping a high electric conductivity state of Au. If Au has a purity of less than 99.999%, an amount of an added amount is limited and affected by impurities. Thus, an addition effect of the added element does not show. Au having a high purity of 99.999% can be obtained through a 2-step refining process including an electric and chemical refining method and a local melting refining method to remove impurities so as to improve the purity.

If at least one of Mo, As, Po, and B is added to Au to less than 2 wt ppm, a ball neck is not prevented from being damaged during forming of an ultralow loop, and high temperature reliability is not improved. If at least one of Mo, As, Po, and B is added to Au to 25 wt ppm or more, an Au bonding wire is hardened. Thus, an excessive stress is concentrated on the ball neck. As a result, the ball neck is damaged. Therefore, contents of theses elements are limited to a range between 2 wt ppm and 25 wt ppm.

In a case where at least one of Na, Cd, Sb, Ta, and Cs is added to Au to less than 2 wt ppm, mold sweeping occurring in one direction in a molding process is not improved. In a case where at least one of Na, Cd, Sb, Ta, and Cs is added to Au to 30 wt ppm or more, molding sweeping occurring in one direction is improved. However, when a hardness of a free air ball is increased, and the free air ball is bonded to a low dielectric semiconductor chip, a chip pad is cracked and a circuit inside a chip is affected. Thus, an electric performance of a semiconductor is deteriorated. Therefore, at least one of Na, Cd, Sb, Ta, and Cs is added to the above-described alloy composition within a range between 2 wt ppm and 30 wt ppm.

If at least one of P, Tc, Re, Tl, and Ho is added to Au to less than 3 wt ppm, high temperature reliability is not improved. If at least one of P, Tc, Re, Tl, and Ho is added to Au to 30 wt ppm or more, a solidified contraction ball is formed at a low portion of the free air ball during forming of the free air ball. Thus, an initial adhesive strength between the Au bonding wire and the chip pad is deteriorated. Accordingly, a content of at least one of P, Tc, Re, Tl, Pb, and Ho is determined within a range between 3 wt ppm and 30 wt ppm.

When Pd, Ca, Ni, and Cu are added to an alloy together with Mo, As, Po, and B, Pd, Ca, Ni, and Cu are very effective in improving high reliability.

The chip pad is generally formed of aluminum (Al). Thus, in a case where an Au alloy bonding wire is bonded to the chip pad, a metal of the Au alloy bonding wire is diffused toward the chip pad. As a result, voids may be formed at the ball neck. Pd forms a layer on an interference between an Au-rich area (i.e., an Au alloy bonding wire area for packaging) and an Al-rich area (i.e., a chip pad area) after bonding to prevent a metal atom from being diffused. Thus, an intermetallic compound and Kirkendal void are inhibited from being formed. As a result, thermal reliability is prevented from being deteriorated. Since Pd also has a high oxidation resistance, Pd improves a tensile strength at a room temperature and high temperature toughness enduring a plurality of annealing processes accompanying a semiconductor packaging process. In addition, Pd improves bonding reliability during bonding of a ball. If Pd is added within a range of 30 wt ppm or less, Pd hardly improves high temperature reliability. If Pd is added within a range of 90 wt ppm or more, Pd increases the hardness of the free air ball. Thus, an addition content of Pd is determined within a range between 30 wt ppm and 90 wt ppm.

Ca increases room temperature and high temperature tensile strengths and inhibits a loop from being sagging or swept, i.e., curved or deformed. When an ultralow loop is formed, Ca increases a yield strength of the ball neck to increase toughness. Thus, Ca is more effective in reducing or removing damage to the ball neck. In particular, although a diameter of the Au alloy bonding wire is small, Ca can inhibit brittleness of the ball neck. If Ca is added within a range of 20 wt ppm or less, Ca hardly improves high temperature reliability. If Ca is added within a range of 90 wt ppm or more, Ca causes an excessive solidified contraction ball at the free air ball, reduces low and high temperature reliabilities during bonding, and increases the damage to the ball neck. Thus, an addition content of Ca is determined within a range between 20 wt ppm and 90 wt ppm.

If each of Ni and Cu is added within a range of 20 wt ppm or less, Ni and Cu hardly improve the high reliability but deteriorate the low and high temperature reliabilities during bonding. Thus, an addition content of each of Ni and Cu is determined within a range between 20 wt ppm and 90 wt ppm.

Experiment Example

Experiments performed on the Au alloy bonding wire mixed with the above-described elements with changes of addition contents of the above-described elements will now be described. However, the experiments are only provided to more easily understand the present invention. The present invention is not limited to the experiments

To fabricate a gold rod, an added element was mixed with Au refined to have a purity of 99.999% or more as shown in embodiments and comparison examples of Table 1, melted, and continuously cast. Next, a cross-section of the gold rod was reduced so that the gold rod was processed as a bonding wire having a desired diameter through a drawing process. The diameter of the bonding wire was 20 μm. Thereafter, the bonding wire was annealed to remove a stress field inside bonding wire and wire curl. TABLE 1 Content of Element Added to Au Alloy Bonding Wire Mo As Po B Na Cd Sb Ta Cs Pd Ca Ni Cu P Tc Re Tl Ho Embodiment 1 10 20 30 20 2 2 2 2 2 30 40 5 5 3 2 10 30 30 20 5 4 25 50 20 5 50 30 5 6 10 10 10 20 40 5 5 7 10 50 20 5 5 8 10 10 20 9 10 10 10 10 30 20 5 10 25 25 40 11 25 25 20 20 12 25 25 13 25 25 25 20 14 50 25 20 15 50 40 16 50 40 17 50 40 18 5 5 2 2 2 2 2 30 20 20 19 5 5 2 2 20 40 20 5 20 5 5 2 2 50 15 15 21 25 2 50 30 22 5 15 15 50 23 2 15 15 15 50 24 15 50 25 2 2 15 50 15 26 2 10 2 15 15 50 27 2 2 30 30 28 2 30 30 30 29 2 30 30 30 30 2 5 5 31 50 15 30 32 15 50 30 33 50 15 15 5 5 5 34 50 15 5 5 5 35 50 5 5 36 50 30 15 15 37 40 15 15 38 30 15 39 2 2 30 15 15 40 30 30 15 41 2 2 40 30 42 25 15 30 43 25 20 20 15 30 44 2 2 15 20 15 5 45 10 15 50 5 5 46 10 2 15 5 47 2 30 20 15 48 2 20 20 49 2 90 50 10 2 60 51 60 52 2 2 90 53 60 5 5 54 60 5 5 55 90 Comparison 1 Example 2 20 30 3 10 50 20 15 4 30 5 50 20 5

Table 2 below shows the results of an evaluation of the bonding wire fabricated using a composition ration as shown in Table 1. Chip cratering, free air ball shape, ball neck damage, mold sweeping, and high temperature reliability (a bond error rate with a lapse of time) were evaluated with respect to the bonding wire.

For chip cratering, “⊚” denotes a very good state without chip cratering, “◯” denotes a good state, “Δ” denotes a normal state, and “x” denotes many occurrences of chip cratering, i.e., a poor state.

For the free air ball shape, a free air ball having a diameter of 40 um was formed and then observed by a scanning electron microscope (SEM). Here, “⊚” denotes a very good state, “◯” denotes a good state, “Δ” denotes a normal state, and “x” denotes a poor state. In the case of the free air ball shape, a determination was made as to whether an oxide was formed on a surface of the free air ball or the shape of the free air ball was distorted.

For the ball neck damage, a loop having a height of about 70 μm was formed as a bonding wire and bonded, and then a degree of preventing the damage to the ball neck was observed. Here, “⊚” denotes a very good state, “◯” denotes a good state, “Δ” denotes a normal state, and “x” denotes a poor state.

Mold sweeping was measured using a ratio of a molding sweeping degree to a length of the bonding wire. Here, “⊚” denotes no generation of mold sweeping, “◯” denotes almost no generation of mold sweeping, “Δ” denotes a slight generation of mold sweeping, and “x” denotes many generations of mold sweeping.

The high temperature reliability may be evaluated using several reliability evaluation methods but was evaluated using a high temp. storage test (HTST) that is recently rising as a great issue. The high temperature reliability was tested under severer time conditions of a range between 175° C. and 1000° C. than time conditions of a range between 150° C. and 1000° C. that are U.S. military spec. A bond pull test was performed on each of examples after a predetermined period of time had elapsed. In a case where the high temperature reliability of each of the examples was less than or equal to a reference value, the high temperature reliability was defined as a failure. Next, 50 Au alloy bonding wires were tested with respect to each of the examples to calculate data.

Error rate (%)=(a number of Au bonding wires having values less than or equal to a reference value)/(a number of Au bonding wires that were tested) TABLE 2 High Temperature Reliability, High Temp. Free Storage Test (HTST)-175° C. Diameter Air Ball Bonding Failure With Respect To Lapse Of Wire Chip Fall Neck Mold Of Time (Ball Lift) Rate (%) 20 μm Cratering Shape Damage Sweeping 0 hr 200 hr 400 hr 600 hr 600 hr 1000 hr Embodiment 1 Δ ⊚ ◯ Δ 0 15 55 80 100 2 X X ◯ X 0 0 0 45 100 3 Δ Δ Δ X 0 0 0 5 10 15 4 ⊚ ⊚ X X 0 0 0 13 55 100 5 X X X X 0 0 0 25 50 100 6 Δ ⊚ X X 0 20 50 100 7 ⊚ Δ X 0 50 60 100 8 ⊚ ⊚ Δ X 0 0 45 90 100 9 Δ Δ X X 0 15 30 60 85 100 10 ⊚ ⊚ X X 0 0 5 25 90 100 11 ⊚ ⊚ X X 0 10 35 65 100 12 ⊚ ⊚ X X 0 30 35 70 100 13 ⊚ ⊚ X X 0 10 80 100 14 X ⊚ X X 0 12 95 100 15 ⊚ ⊚ X X 0 35 65 70 100 16 ⊚ ⊚ X X 0 0 55 100 17 ⊚ ⊚ ⊚ X 0 0 0 50 75 90 18 ⊚ ⊚ ◯ ⊚ 0 0 0 15 60 80 19 Δ Δ ◯ ◯ 0 0 5 16 22 50 20 X X ◯ ◯ 0 0 0 10 25 65 21 ⊚ ⊚ ⊚ ⊚ 0 0 0 12 55 80 22 X ⊚ ⊚ ⊚ 0 30 80 100 23 ⊚ ⊚ ⊚ ⊚ 0 55 75 100 24 ⊚ ⊚ ⊚ ⊚ 0 0 10 15 35 70 25 ⊚ ⊚ ⊚ ⊚ 0 0 0 65 100 26 ⊚ ⊚ Δ ⊚ 0 0 0 10 35 85 27 X ⊚ ◯ ⊚ 0 0 10 15 85 100 28 ⊚ ⊚ ⊚ ⊚ 0 10 25 65 85 90 29 ⊚ ⊚ ⊚ ⊚ 0 0 0 25 55 100 30 Δ Δ ⊚ ⊚ 0 0 32 62 100 31 ⊚ ⊚ ⊚ ⊚ 0 0 0 0 30 75 32 ◯ ⊚ ⊚ ⊚ 0 0 50 100 33 Δ X X ⊚ 0 20 50 100 34 X Δ X ⊚ 0 50 100 35 X ⊚ X ◯ 0 75 100 36 X X X ⊚ 0 65 100 37 Δ X ⊚ X 0 0 0 5 30 45 38 Δ X ⊚ Δ 0 0 0 10 30 86 39 X ⊚ Δ 0 0 34 65 100 40 ⊚ X ⊚ X 0 0 20 100 41 ⊚ X ⊚ 0 0 0 8 15 65 42 ⊚ X Δ ⊚ 0 20 40 100 43 ◯ X Δ Δ 0 0 5 5 30 45 44 ⊚ X ⊚ ◯ 0 0 10 65 100 45 ⊚ X ◯ ◯ 0 20 65 80 100 46 ⊚ X ◯ ◯ 0 5 5 10 80 100 47 ⊚ ◯ ⊚ Δ 0 10 23 65 100 48 ◯ Δ ⊚ X 0 5 10 35 65 80 49 ◯ ◯ ⊚ Δ 0 0 0 50 80 85 50 ◯ ⊚ ◯ Δ 0 0 0 0 10 30 51 ⊚ ⊚ ⊚ X 0 0 0 5 10 30 52 ⊚ ⊚ ⊚ X 0 0 20 60 95 100 53 X Δ ⊚ X 0 38 55 65 100 54 ⊚ ◯ ⊚ X 0 0 0 3 8 85 55 ⊚ ⊚ ⊚ X 0 0 5 41 50 70 Comparison 1 Δ ⊚ ⊚ X 0 45 100 Example 2 ◯ Δ ⊚ X 0 20 35 100 3 X ⊚ ◯ ⊚ 0 0 0 5 65 100 4 ⊚ Δ ⊚ ⊚ 0 25 75 85 100 5 X Δ ⊚ X 0 0 0 21 36 75

As shown in Tables 1 and 2, the Au alloy includes at least one of Mo, As, Po, and B in the embodiments 4, 5, 6, 9 through 17, and 33 through 36. A content of the at least one exceeds 25 wt ppm. Thus, the ball neck is damaged. Therefore, contents of Mo, As, Po, and B may be limited within a range of 25 wt ppm or less.

The Au alloy includes at least one of Na, Cd, Sb, Ta, and Cs in the embodiments 21 through 23, 25 through 34, and 36. A content of the at least one exceeds 30 wt ppm. Here, mold sweeping is improved, but the hardness of the free air ball is increased. Thus, when the Au alloy bonding wire is bonded to a low dielectric semiconductor chip, a chip pad is cracked during bonding and a circuit inside the semiconductor chip is affected by the increased hardness of the free air ball. Therefore, contents of Na, Cd, Sb, Ta, and Cs may be determined within a range of 30 wt ppm or less.

The Au alloy includes at least one of P, Tc, Re, Tl, and Ho in the embodiments 41 through 44 and 46. A content of the at least one exceeds 30 wt ppm. Thus, the shape of the free air ball is poor. Thus, contents of P, Tc, Re, Tl, and Ho may be determined within a range of 30 wt ppm or less.

In cases of embodiments of bonding wires having a composition suggested in the present invention, boning portions with a chip pad can be prevented from being cracked. Also, a ball neck can be prevented from being damaged even at a low loop. In addition, mold sweeping occurring in a molding process can be improved. Moreover, the bonding wires can be applied to a low dielectric semiconductor chip. Furthermore, as shown in Tables 1 and 2, high temperature reliability is high.

Although an Au alloy bonding wire fabricated using an alloy according to the present invention includes an element of less than 100 wt ppm, a bonding portion between the Au alloy bonding wire and a chip pad can be prevented from being cracked. Since a content of the added element is small, a purity of Au can be kept to 99.99% or more. Thus, an electric characteristic can be high, and a time delay of an electric signal caused by an increase in an electric resistance can be solved. Also, the bonding portion between the Au alloy bonding wire and the chip pad can be prevented from being cracked at a work temperature of 150° C. and a reliability test temperature. In other words, high temperature reliability is improved. Thus, when the Au alloy bonding wire is used as an electric wire for packaging a semiconductor device, the Au alloy bonding wire can be highly effective in terms of industry. Since an initial bonding strength and the high temperature reliability can be improved, the Au alloy bonding wire according to the present invention can increase the lifespan of a semiconductor package two times compared to an Au bonding wire using an existing alloy composition.

Since the Au alloy bonding wire according to the present invention has an appropriate strength, mold sweeping occurring in a molding process can be improved or solved. Also, in a case where an ultralow loop is formed, a ball neck can be prevented from being damaged.

In addition, the Au alloy bonding wire according to the present invention has an appropriate hardness. Thus, when the Au alloy bonding wire is bonded to a low dielectric semiconductor chip, an adhesive strength and a mechanical strength with respect to a silicon or metal wire can be high. A conventional bonding wire is weak. Thus, although the conventional bonding wire receives a weak force from an external source, the conventional bonding wire is easily cracked or stripped, which affects an internal circuit. As a result, an electric performance of a semiconductor is reduced. However, the Au alloy bonding wire according to the present invention can solve these problems the conventional bonding wire has.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present invention as defined by the following claims. 

1. A gold (Au) alloy bonding wire in which at least one of Mo, As, Po, and B is added to high-purity gold of 99.999% or more in an amount of 2-25 parts per million by weight (wt ppm) to the high-purity gold.
 2. A gold alloy bonding wire in which at least one of Na, Cd, Sb, Ta, and Cs is added to high-purity gold of 99.999% or more in an amount of 2-30 wt ppm to the high-purity gold.
 3. A gold alloy bonding wire in which at least one of P, Tc, Re, Tl, and Ho is added to high-purity gold of 99.999% or more in an amount of 3-30 wt ppm to the high-purity gold.
 4. The gold alloy bonding wire of claim 1, wherein at least one of Na, Cd, Sb, Ta, and Cs is further added to the high-purity gold in an amount of 2-30 wt ppm.
 5. The gold alloy bonding wire of claim 1, wherein at least one of Pd in an amount of 30-90 wt ppm and Ca in an amount of 20-90 wt ppm is further added to the high-purity gold.
 6. The gold alloy bonding wire of claim 1, wherein at least one of P, Tc, Re, Tl, and Ho is further added to the high-purity gold in an amount of 3-30 wt ppm.
 7. The gold alloy bonding wire of claim 6, wherein at least one of Ni and Cu is further added to the high-purity gold in an amount of 20-90 wt ppm.
 8. The gold alloy bonding wire of claim 2, wherein at least one of P, Tc, Re, Tl, and Ho is further added to the high-purity gold in an amount of 3-30 wt ppm.
 9. The gold alloy bonding wire of claim 8, wherein at least one of Ni and Cu is further added to the high-purity gold in an amount of 20-90 wt ppm.
 10. The gold alloy bonding wire of claim 4, wherein at least one of P, Tc, Re, Tl, and Ho is further added to the high-purity gold in an amount of 3-30 wt ppm.
 11. The gold alloy bonding wire of claim 10, wherein at least one of Ni and Cu is further added to the high-purity gold in an amount of 20-90 wt ppm. 